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Authors
Affiliations
1 Department of Physics & Electronics, RGM Engg College, JNT University, Anantapur-518501, Andhra Pradesh, IN
2 Department of Physics, Sri Krishnadevaraya University, Anantapur-515003, Andhra Pradesh, IN
3 Department of ECE, RGM Engg College, JNT University, Anantapur-518501, Andhra Pradeh, IN
Source
International Journal of Advanced Networking and Applications, Vol 3, No 1 (2011), Pagination: 1031-1034
Abstract
This paper presents C2Mos register Pipelined Modified Booth Multiplier (PMBM) to improve the speed of the multiplier by allowing the data parallel. The pipeline registers are designed with two p-mos and two n-mos transistors in series which is C2Mos. Wallace multiplier also used to improve the speed of the multiplier with Carry Save Addition. 16-Transitor Full adders are used for better performance of the multiplier. The PMBM is 28.51% more speed than the Modified Booth Multiplier (MBM). This is calculated with TSMC 0.18 um technology using Hspice.
Keywords
Modified Booth Multiplier, Pipeline, Register, Wallace Tree.
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